Analog-to-Digital Converters (ADCs) are essential building blocks for every System-on-Chip (SoC), allowing interaction between the outside (analog) world and the digital on-chip processing logic. The design of an ADC is a time-consuming process that requires an experienced designer. This challenge has only increased in magnitude with technology scaling introducing lower supply voltages hence complicating this design process. Even with careful design, the ADC is subject to distortion due to variations in the Integrated Circuit (IC) manufacturing process.
To overcome these challenges, a novel approach is taken by using Machine Learning (ML), or more specifically, a neural network to mitigate this issue. The neural network learns to calibrate the analog non-idealities by compensating the analog impairments using digital correction logic. This can relax the analog specifications or increase the performance beyond the current state-of-the-art.
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